Real-time believable stereo and virtual view synthesis engine for autostereoscopic display
- Day - Time: 17 October 2012, h.09:30
- Place: Area della Ricerca CNR di Pisa - Room: I-53
- Jiang Wang (Ph.D degree in Chinese Academy of Sciences in 2006; currently ERCIM fellow at NTNU, Norway)
An FPGA and VLSI oriented stereo and virtual view synthesis engine is designed for the autostereoscopic display in the distributed multimedia plays application. To acquire the believable rendering not only for the stereo but also for the distant virtual view synthesis, the depth image based rendering (DIBR) is applied in the referenced depth and texture images. The homogeneous depth continuity is statistically analyzed and the corresponding texture is compensated for the hole filling. To meet the real time constraints, computation and memory access intensive modules are realized by hardware accelerating, and the processing is in raster scan pixel line stream rather than frame buffer bulk or macro block line. The simulation and implementation show that based on the correlation of depth in referenced images, the believable rendering is acquired in real time. Also, there exists the challenges for complicated scenario rendering.